JEDEC announced plans for LPDDR6: modules up to 512 GB, aimed at artificial intelligence

Short on JEDEC news

It looks like a new memory standard – LPDDR6
Planned up to 512 GB per module; aimed not just at mobile devices but also data centers (DC) and AI workloads.

Development of JESD209‑6
The specification will be based on the version published in July 2025.

Architectural changes
Move from binary to non-binary interface: x16 → x24, x12, and x6. The x6 mode allows more chips to fit in a single package, increasing capacity per component and channel – a key factor for AI workloads.

Flexible metadata reservation
Will let DC clients independently balance user memory and metadata volume without losing peak throughput.

Potential capacity
LPDDR6 is expected to surpass the maximum of LPDDR5/5X and reach 512 GB per module – answering growing memory demands for AI training and inference.

Subcommittee JC‑42.6: two new standards
Standard Key features
LPDDR6 SOCAMM2 (module)
Keeps a compact, replaceable form factor; provides a smooth transition from LPDDR5X SOCAMM2.
LPDDR6 PIM (Processing‑in‑Memory)
Under development almost to completion. Built-in compute blocks enable inference directly in memory, reducing data movement and boosting performance with lower power consumption.

Why it matters
- Scalability: New interfaces (x24/x12/x6) allow more chips per module, critical for large AI workloads.
- Efficiency: PIM reduces latency and power by performing local computations.
- Flexibility: The ability to adjust metadata volume lets memory be tailored to specific reliability and performance requirements.

Thus, JEDEC is positioning LPDDR6 as a universal solution for mobile devices, data centers, and high-performance AI systems, combining higher capacity, flexible architecture, and built-in compute capabilities.